About FPGA Orca

ORCA 3C/T Series FPGAs

3C/T Chip

The ORCA OR3C/T Series is the new generation of SRAM-based FPGAs from Lucent Technologies, with enhancements and innovations geared toward today's high-speed designs and tomorrow's systems on a single chip.

Designed from the start to be synthesis friendly and to reduce place and route times while maintaining the complete routability of the ORCA 2C/2T devices, the OR3C/T series more than doubles the logic available in each PFU and incorporates system-level features that further reduce logic requirements and increase system speed. OR3C/T devices contain many new patented architectural enhancements and are offered in a variety of packages, speed grades, and temperature ranges.

The ORCA OR3C/T series FPGAs consist of three basic elements: Programmable Logic Cells (PLCs), Programmable Input/output Cells (PICs), and system-level features. An array of PLCs is surrounded by PICs. Each PLC contains a Programmable Function Unit (PFU), a Supplemental Logic (SLIC) and Interconnect Cell, local routing resources, and configuration RAM. Most of the FPGA logic is performed in the PFU, whereas decoders, (PAL-like functions), and 3-state buffering can be performed in the SLIC. The PICs can be used to register signals, perform input demultiplexing, and perform output multiplexing and other functions on two output signals. Some of the system-level functions include the new MicroProcessor Interface (MPI) and the Programmable Clock Manager (PCM).

Devices will be offered in a 5 V version (OR3C) and 3.3 V version (OR3T) in a variety of industry-standard packages.

Device Offerings  [ TOP ]

Device Usable Gates* Registers Max User RAM User I/Os Array Size (PLCs) Process Technology
OR3C/T30 24K-48K 2212 25K 228 14x14 0.35/0.25 µm
4 LM
OR3C/T55 40K-80K 3492 41K 292 18x18 0.35/0.25 µm
4 LM
OR3C/T80 58K-116K 5060 62K 356 22x22 0.35/0.25 µm
4 LM
OR3T125 92K-186K 7952 100K 452 28x28 0.25 µm
4 LM
OR3T165 120K-244K 10240 131K 516 32x32 0.25 µm
4 LM
OR3T225 166K-340K 14212 185K 612 38x38 0.25 µm
4 LM
* The usable gate counts range from a logic-only gate count to a gate count assuming 30% of the PFUs/SLICs being used as RAMs. The logic-only gate count includes each PFU/SLIC (counted as 108 gates per PFU/SLIC), including 12 gates per LUT/FF pair (eight per PFU), and 12 gates per SLIC/FF pair (one per PFU). Each of the four PIOs per PIC is counted as 16 gates (2 FFs, fast capture latch, output logic, CLK drivers, and I/O buffers). PFUs used as RAM are counted at four gates per bit, with each PFU capable of implementing a 32x4 RAM (or 512 gates) per PFU.

Product Literature  [ TOP ]

Pdf Product Brief
ORCA OR3C/T Series FPGAs (188 Kb)

This product brief describes the features in the newest addition to the ORCA family of FPGAs. The 3C/3T Series offers up to 186,000 usable gates and 452 user I/Os in 0.35 µm and 320,000 usable gates in 0.25 µm CMOS technology.

Pdf Data Sheet
ORCA OR3C/T Series FPGAs (1730 Kb)

These FPGAs feature even higher performance, higher density, and many new features including a Programmable Clock Manager (PCM) and Microprocessor Imterfaces (MPI).

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